The present invention relates to a current mirror circuit and, more particularly, to an improved current mirror circuit having a plurality of input terminals and output terminals, whereby a desired input/output current ratio can be obtained with a high degree of accuracy.
The above-mentioned current mirror circuit having a plurality of input terminals and output terminals is constituted in such a manner than input currents are selectively supplied to those plurality of input terminals, thereby allowing output currents to be selectively introduced from those plurality of output terminals.
FIG. 1 shows a conventional current mirror circuit 1 which can be thought of as having the constitution mentioned above. This current mirror circuit 1 has two sets of transistor pairs Q.sub.1, Q.sub.2 and Q.sub.3, Q.sub.4 whose bases are interconnected, respectively. Each emitter of these transistors Q.sub.1, Q.sub.2, Q.sub.3, and Q.sub.4 is grounded respectively through their corresponding resistors R.sub.1, R.sub.2, R.sub.3, and R.sub.4. In this example, the means 10a and 10b for supplying base currents to each base of the transistor pairs Q.sub.1, Q.sub.2 and Q.sub.3, Q.sub.4 are formed as follows. The means 10a is formed by connecting the collector and the base of the transistor Q.sub.1. The means 10b is formed by connecting the collector and the base of the transistor Q.sub.4.
In the above-mentioned current mirror circuit 1, the collectors of the transistors Q.sub.1 and Q.sub.4 are correspondingly connected to input terminals 5 and 6, respectively. Output terminals 8 and 9, responsive to these input terminals 5 and 6, are connected to the collectors of the transistors Q.sub.2 and Q.sub.3, respectively.
The operation of the current mirror circuit 1 will now be described.
A control current I is alternately supplied from an input terminal of the control current (CONTROL CURRENT IN) through a switching circuit 3 to the input terminals 5 and 6 of the current mirror circuit 1. Now, assuming that a change-over switch in the switching circuit 3 has been switched to the side of the input terminal 5, an input current I.sub.1 (=I) will be supplied to the collector of the transistor Q.sub.1. At this time, since the bases of the transistors Q.sub.1 and Q.sub.2 are commonly connected and since the collector and the base of the transistor Q.sub.1 are also connected, the base voltage V.sub.BE1 to be generated at the transistor Q.sub.1 is equal to the base voltage V.sub.BE2 to be generated at the transistor Q.sub.2. This allows an output current I.sub.2 to flow through the collector of the transistor Q.sub.2. The above-mentioned operation is also performed in substantially the similar manner as in the case where an input current I.sub.4 (=I) was supplied to the input terminal 6. By allowing the input current I.sub.4 to flow through the collector of the transistor Q.sub.4, an output current I.sub.3 can flow through the collector of the transistor Q.sub.3.
In the case where the characteristics of the transistors Q.sub.1, Q.sub.2 and the characteristics of the transistors Q.sub.3, Q.sub.4 are equal, the resistance values of the resistors R.sub.1, R.sub.2 and the resistance values of the resistors R.sub.3, R.sub.4 are also equal. Thus, the input current I.sub.1 becomes equal to the output current I.sub.2, and the input current I.sub.4 becomes equal to the output current I.sub.3. At this time, in the example shown in FIG. 1, I.sub.2 =I.sub.3 since I.sub.1 =I.sub.4 (=I) and since their mutual input/output current ratios (I.sub.2 /I.sub.1) and (I.sub.3 / I.sub.4) also equal "1".
However, it is actually difficult to strictly make the resistance values of the resistors R.sub.1 and R.sub.2, and those of R.sub.3 and R.sub.4 coincide with each other, so that we cannot help but admitting the occurrence of variations in resistance values. Even if the values of the input currents I.sub.1 and I.sub.4 are made equal, the mutual values of I.sub.2 and I.sub.3 as the output currents do not always become equal due to variations in the resistance values.
For example, when the variation in the resistance values between the resistors R.sub.1 and R.sub.2, and the variation in the resistance values between the resistors R.sub.3 and R.sub.4 were set to be 3%, respectively, assuming that EQU I.sub.2 /I.sub.1 =R.sub.1 /R.sub.2 =0.97, I.sub.3 /I.sub.4 =R.sub.4 /R.sub.3 =1.03
by supposing the worst state, we will have EQU I.sub.3 /I.sub.2 =R.sub.2 /R.sub.1 .multidot.R.sub.4 /R.sub.3 =1.03/0.97.apprxeq.1.06
Therefore, a variation of 6% will occur between the output currents I.sub.2 and I.sub.3.
In addition, as it is difficult to make the resistance value coincide strictly with the above, it is also difficult to equalize the characteristics between the transistors Q.sub.1 and Q.sub.2, and between the transistors Q.sub.3 and Q.sub.4. However, the influence of the variation in the characteristics of these transistors upon the output currents I.sub.2 and I.sub.3 can be ignored when compared with the influence of the variation in the resistance values mentioned above.
As described above, in the conventional current mirror circuit 1, even if the input currents I.sub.1 and I.sub.4 are equalized, the values of the output currents I.sub.2 and I.sub.3 to be output in response to the respective input currents I.sub.1 and I.sub.4 will not become equal because of the influence from the variation in the values of the resistors R.sub.1, R.sub.2, R.sub.3, and R.sub.4. Therefore, it is impossible to correctly obtain the necessary input/output current ratios (I.sub.2 /I.sub.1) and (I.sub.3 /I.sub.4) of "1".
Namely, the conventional current mirror circuit 1 has the problem that when a plurality of output currents are obtained by a plurality of input currents, it is impossible to set the mutual input/output current ratios at a desired value as accurately as possible.
On the other hand, in the case of setting the input/output current ratios (I.sub.2 /I.sub.1) and (I.sub.3 /I.sub.4) at an arbitrary value other than "1", for instance, each resistance ratio between the resistors R.sub.1 and R.sub.2, and between R.sub.3 and R.sub.4 may be set at a proper value.